The present application claims priority to Korean Patent Application Nos. 2001-14140 filed Mar. 19, 2001 and 2001-18336 filed Apr. 6, 2001.
(Not Applicable)
1. Field of the Invention
The present invention relates generally to semiconductor packages, and more particularly to a semiconductor package which is sized and configured to, among other things, optimize the bonding strength between the lead frame and the remainder of the package, prevent moisture permeation into the package, and minimize cracking of the package during the process of manufacturing the same.
2. Description of the Related Art
The current trend in the electronics industry is to provide electronic appliances which are multi-functional, compact, and capable of achieving high performance levels. In view of this trend, a requirement has arisen that the semiconductor packages which are used in such electronic appliances be made in a xe2x80x9cchip sizexe2x80x9d. These chip-size packages are often referred to as a chip scale package or CSP. These chip-sized small semiconductor packages are usable in portable products such as cellular phones and PDA""s which require high levels of reliability, electrical efficiency, and a small or compact size of minimal weight.
One type of currently manufactured CSP is a very small semiconductor package including a lead frame. This particular type of semiconductor package is constructed in a manner wherein a plurality of input/output signal lands (e.g. from four to one hundred signal lands) are formed at the edge of the bottom surface of the package. This configuration is in contrast to conventional lead frame packages which include, as an alternative to these signal lands, leads which project outwardly from the package and are formed by various trimming/forming techniques. In addition to including the signal lands formed at the periphery of the bottom surface thereof, these semiconductor packages also include a chip mounting pad, the bottom surface of which is exposed for purposes of maximizing an emission rate of heat generated by a semiconductor chip mounted thereto.
Though the above-described semiconductor packages provide the small size required by the electronic appliances discussed above, they possess certain deficiencies which detract from their overall utility. One such deficiency is the susceptibility of the semiconductor package to cracking during the process of manufacturing the same, and the further susceptibility of the semiconductor package to moisture permeation to the internal semiconductor chip. The susceptibility to moisture permeation is largely attributable to the minimal contact area between the lead frame and the remainder of the semiconductor package. This minimal contact area also gives rise to problems attributable to insufficient bonding strength between the lead frame and the remainder of the semiconductor package. The lack of adequate bonding strength makes the semiconductor package vulnerable to failure attributable to the creation of electrical discontinuities between the lead frame and the semiconductor chip and/or the dislodging of one or more of the signal lands of the lead frame from the remainder of the semiconductor package.
In accordance with the present invention, there is provided a semiconductor package including a lead frame and an encapsulation portion or sealing part which is formed on a prescribed region of the lead frame. The lead frame of the present semiconductor package is formed to have a thin profile so as to minimize occurrences of the cracking of the semiconductor package during the process of manufacturing the same, which typically involves the completion of a singulation process or step. Additionally, in the present semiconductor package, the contact area between the sealing part and the lead frame is maximized to improve the bonding strength between the lead frame and the sealing part. This improved bond strength substantially eliminates occurrences of delamination between the sealing part and the lead frame, such as the inadvertent dislodging of the signal lands of the lead frame from the sealing part. Further, the lead frame and the sealing part are sized and configured relative to each other such that the increased contact area between them also increases the lengths of those passages which would be susceptible to moisture permeation to the semiconductor chip of the semiconductor package. This structural attribute substantially prevents occurrences of moisture permeation as could adversely affect the performance of the semiconductor package.
The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanying drawings.